Syllabus
Course Objective
Physical design of VLSI systems is the process of transforming the
given structural representation of a VLSI system into layout
representation. The objective of physical design automation is to
carry out such transformation efficiently using computers so that the
resulting layout satisfies topological, geometric, timing and
power-consumption constraints of the design. This course focuses on
various design automation problems in the physical design process of
VLSI circuits, including: logic partitioning, floorplanning, global
routing, detailed routing, compaction, and performance-driven
layout. We shall also discuss the applications of a number of
important optimization techniques, such as network flow, Steiner tree,
scheduling, simulated annealing, generic algorithm, and linear/convex
programming.
Topics
- Design and Fabrication of VLSI Devices
- Partitioning
- Clustering
- Floorplanning
- Placement
- Steiner Routing
- Multi-net Routing
Prerequisites
No official prerequisites, but some experience in VLSI design,
algorithm analysis, C++ programming, and/or data structure design
would be helpful.
Textbook
Sung Kyu Lim, "Practical Problems in VLSI Physical Design Automation,"
Springer, July 2008 (ISBN: 978-1-4020-6626-9).
Grading
Homework (15%), attendance (5%), 2 midterms (45%), and final (35%). Attendance check will start from the second week. The exams are in-class and closed-book. Optional projects (mostly C/C++ programming) are available, and they will replace the final exam.
Attendance Policy
The following rules will be enforced:
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Make sure to sign in on your attendance sheet BEFORE you leave the classroom. I will say no if you say "I was here last time but forgot to sign in".
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The only excused absences include on-site interviews and doctor's appointments. For both cases, I will need to see a proof BEFORE your planned absence.
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I am willing to consider other special circumstances, so feel free to talk with me BEFORE your planned absence.