Assignment 1

  1. Perform placement and routing on the following three circuits:

    The placement for IC2 will take around 20 sec, and IC3 60 sec. The routing time for IC2 is around 1 min, and IC3 5 min. Yes, it's time for a coffee break.

  2. How to set up the layout area
    • Specify By: Size
    • Core Size by : Aspect Ratio
    • Ratio (H/W) : 1.0
    • Check 'Core Utilization' (by doing this, you make Innovus determine the core size automatically)
    • Core Utilization : 0.8
    • Core Margins by : Core to IO Boundary
    • Core to Left, Core to Top, Core to Right and Core to Bottom : 5 (for IC1), 10 (for IC2), 20 (for IC3)
    • Die Size Calculation Use : Min IO Height
    • Floorplan Origin at : Lower Left Corner
    • Do not change the options in Advanced Tab.

  3. Placement options
    • setPlaceMode -timingdriven -reorderScan -congMediumEffort -doCongOpt -modulePlan
    • setPlaceMode -timingDriven true -place_global_reorder_scan true -place_global_cong_effort medium -doCongOpt -modulePlan -maxRouteLayer N
    • Note that for "-maxRouteLayer N", N is 5 for IC1, 6 for IC2 and 7 for IC3
    • If you see 'buffer footprint is not defined' or 'Buffer footprint is not specified' error messages during placement, just ignore.

  4. Routing options
    • Do not change any options.
    • Make sure that the 'Top Layer' in 'Routing Control' box is same as the value in 'specify maximum routing layer' during placement.
    • Make sure that you don't have any DRC violation after routing is done. If you have, do routing again. If you still have DRC violation, go back to '1.1 Set up the layout area' step, decrease core utilization by 0.05 and do placement/routing again until there is no DRC violation. If you decreased core utilization, write down the number in your report.
    • Make sure to save IC1 in gdsii format after routing is done successfully. It will be loaded in Cadence Virtuoso.

  5. What to turn in (for each circuit)
    • A die snapshot after placement+routing is done. (Visibilities of cells, all metal layers and vias should be turned on)
    • Total wirelength of detailed routing
    • Total wirelength of each metal layer of detailed routing
    • Total number of vias of detailed routing
    • Total number of each via (e.g., M1-M2 via) of detailed routing
    • Runtime for placement
    • Runtime for routing
    • A die snapshot which shows only standard cells (only for IC1)
    • A die snapshot which shows only metal layer 2 (only for IC1). Turn off the visibility of 'Instance' to remove standard cells in the main window.
    • A die snapshot which shows only metal layer 3 (only for IC1). Turn off the visibility of 'Instance' to remove standard cells in the main window.

Assignment 2 (only for IC1)

  1. Relationship between core utilization and total wirelength
    • Draw and analyze a graph whose X-axis is core utilization (0.3~0.8) and Y-axis is total wirelength of detailed routing.
    • Instructions:
      • Restart Innovus before doing this.
      • Use the same layout area options as 1.2 except core utilization. At this time, you have to change the value.
      • Do placement with the same placement options as 1.3.
      • Do routing with the same routing options as 1.4.
      • After routing is done successfully, look at your command shell window and figure out the total wirelength of detailed routing.
      • Repeat above steps for different core utilization (0.3, 0.4, ..., 0.8).

  2. Relationship between core utilization and # metal layers used in routing
    • Draw and analyze a graph whose X-axis is core utilization (0.3~0.8) and Y-axis is the number of metal layers used in detailed routing.
    • Instructions:
      • Restart Innovus before doing this.
      • Use the same layout area options as 1.2 above except core utilization. At this time, you have to change the value.
      • Do placement with the same placement options as 1.3 but remove '-maxRouteLayer N' option.
      • Do routing with the same routing options as 1.4 but the 'Top Layer' in 'Routing Control' box should be 'default'.
      • After routing is done successfully, look at your command shell window and figure out the number of metal layers used in detailed routing. Since you didn't specify the maximum routing layer, Innovus will determine it.
      • Repeat above steps for different core utilizations (0.3, 0.4, ..., 0.8).

  3. Relationship between # metal layers used in routing and total wirelength
    • Draw and analyze a graph whose X-axis is the number of metal layers (2~10) used in detailed routing and Y-axis is the total wirelength of detailed routing.
    • Instructions:
      • Restart Innovus before doing this.
      • Use the same layout area options as 1.2 except core utilization. At this time, set the value to 0.5.
      • Do placement with the same placement options as 1.3 but N should be from 2 to 10 at this time.
      • Do routing with the same routing options as 1.4 but the 'Top Layer' in 'Routing Control' box should be same as the topmost metal layer specified in placement.
      • After routing is done successfully, look at your command shell window and figure out the total wirelength of detailed routing.
      • Repeat above steps for the different number of metal layers (2, 3, ..., 10).
    • If routing fails, do placement and routing again. If routing still fails, proceed to the next number of metal layers.